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2.NSF Publications
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search.filters.author.Jayananda, M.K.
3
search.filters.author.Sonnadara, D.U.J.
3
search.filters.author.Wijesinghe, W.A.S.
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search.filters.subject.Information Communication Technology
2
search.filters.subject.Reconfigurable computing
2
search.filters.subject.VHDL
1
search.filters.subject.Complex programmable logic device (CPLD)
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search.filters.subject.Computer hardware
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Item
Simulation of diffusion limited aggregation in field programmable gate arrays
(
NSF:Colombo
,
2010-12
)
Wijesinghe, W.A.S.
;
Jayananda, M.K.
;
Sonnadara, D.U.J.
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Item
A simple reconfigurable microprocessor in a 36 macrocell CPLD
(
NSF. Colombo
,
2011
)
Wijesinghe, W.A.S.
;
Jayananda, M.K.
;
Sonnadara, D.U.J.
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Item
Performance evaluation of multipliers in reconfigurable hardware
(
National Science Foundation:Colombo
,
2008-9
)
Wijesinghe, W.A.S.
;
Jayananda, M.K.
;
Sonnadara, D.U.J.
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