A simple reconfigurable microprocessor in a 36 macrocell CPLD

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JNSF39_3_261.pdf (135.36 KB)

Date

Authors

Wijesinghe, W.A.S.

Jayananda, M.K.

Sonnadara, D.U.J.

Publisher

NSF. Colombo

Keywords

Information Communication Technology, Data acquisition, Complex programmable logic device (CPLD), Field programmable gate arrays(EPGA), Microcontrollers, Reconfigurable computing, Hardware description language, VHDL

Citation

Journal of the National Science Foundation of Sri Lanka39(3)pp.261-266

URI

https://dl.nsf.gov.lk/handle/1/9021

Collections

Journal of the National Science Foundation of Sri Lanka